Hot-carrier-induced degradation in short p-channel nonhydrogenated polysilicon thin-film transistors

Abstract

The effects of low gate voltage |V/sub g/| stress (V/sub g/=-2.5 V, V/sub d/=-12 V) and high gate voltage |V/sub g/| stress (V/sub g/=V/sub d/=-12 V) on the stability of short p-channel nonhydrogenated polysilicon TFTs were studied. The degradation mechanisms were identified from the evolution with stress time of the static device parameters and the low-frequency drain current noise spectral density. After low |V/sub g/| stress, transconductance overshoot, kinks in the transfer characteristics, and positive threshold voltage shift were observed. Hot-electron trapping in the gate oxide near the drain end and generation of donor-type interface deep states in the channel region are the dominant degradation mechanisms. After high |V/sub g/| stress, transconductance overshoot and "turn-over" behavior in the threshold voltage were observed. Hot-electron trapping near the drain junction dominates during the initial stages of stress, while channel holes are injected into the gate oxide followed by interface band-tail states generation as the stress proceeds.