Vertically Stacked Carbon Nanotube-Based Interconnects for Through Silicon Via Application

Abstract

Stacking of silicon chips with carbon nanotube (CNT)-based through-silicon vias (TSVs) is experimentally demonstrated. Polymer filling is used to improve the transfer quality of CNTs into pre-etched silicon holes. Special hexagonal CNTs are designed to achieve high aspect ratio (10:1) CNT vias. TSVs filled with closely packed CNTs show a highly linear dc I-V response. The proposed process works at room temperature, which makes it compatible with existing device fabrication flow.