High-Level Language Tools for Reconfigurable Computing

TLDR

FPGAs offer a compelling middle ground between software flexibility and ASIC performance, yet their adoption is hindered by a lack of high‑level programming abstractions and a complex tool chain. This paper reviews the history of FPGAs as hardware accelerators and identifies the challenges to raising programming abstraction layers. The authors survey five high‑level language tools—Xilinx Vivado, Altera OpenCL, BluespecBSV, ROCCC, and LegUp—to describe their tool flows, optimizations, and provide a qualitative analysis of their hardware implementations. The survey highlights qualitative differences in hardware implementations and optimization strategies among the five tools, underscoring the need for improved abstraction layers.

Abstract

In the past decade or so we have witnessed a steadily increasing interest in FPGAs as hardware accelerators: they provide an excellent mid-point between the reprogrammability of software devices (CPUs, DSPs, and GPUs) and the performance and low energy consumption of ASICs. However, the programmability of FPGA-based accelerators remains one of the biggest obstacles to their wider adoption. Developing FPGA programs requires extensive familiarity with hardware design and experience with a tedious and complex tool chain. For half a century, layers of abstractions have been developed that simplify the software development process: languages, compilers, dynamically linked libraries, operating systems, APIs, etc. Very little, if any, such abstractions exist in the development of FPGA programs. In this paper, we review the history of using FPGAs as hardware accelerators and summarize the challenges facing the raising of the programming abstraction layers. We survey five High-Level Language tools for the development of FPGA programs: Xilinx Vivado, Altera OpenCL, BluespecBSV, ROCCC, and LegUp to provide an overview of their tool flow, the optimizations they provide, and a qualitative analysis of their hardware implementations of high level code.