Publication | Closed Access
A sub-130-nm conditional keeper technique
197
Citations
9
References
2002
Year
Hardware SecurityLow-power ElectronicsElectrical EngineeringStatistical Signal ProcessingEngineeringVlsi DesignCircuit DesignConditional Keeper TopologiesCircuit SystemComputer EngineeringWide Dynamic GatesComputer ScienceDetection TechniqueMicroelectronicsSignal ProcessingLeakage CurrentsSignal Integrity
Leakage currents and reduced noise margins degrade the robustness of wide dynamic circuits. The paper proposes two conditional keeper topologies to enhance robustness of sub‑130‑nm wide dynamic circuits. The proposed keepers activate only a large fraction conditionally, enabling strong keepers with leaky precharged circuits while maintaining performance in both normal operation and burn‑in testing. Compared to conventional techniques, the conditional keepers achieve up to 28% higher performance and reduce active area by 64% during burn‑in.
Increasing leakage currents combined with reduced noise margins significantly degrade the robustness of wide dynamic circuits. In this paper, we describe two conditional keeper topologies for improving the robustness of sub-130-nm wide dynamic circuits. They are applicable in normal mode of operation as well as during burn-in test. A large fraction of the keepers is activated conditionally, allowing the use of strong keepers with leaky precharged circuits without significant impact on performance of the circuits. Compared to conventional techniques, up to 28% higher performance has been observed for wide dynamic gates in a 130-nm technology. In addition, the proposed burn-in keeper results in 64% active area reduction.
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