Concepedia

Analysis of different techniques for low power Single Edge Triggered Flip Flops

Imran Ahmed Khan, Owais Ahmad Shah, Mirza Tariq Beg

2011 · 11 citations · 9 references

Abstract

In this paper, we compared various different techniques of previously published Single Edge Triggered Flip Flops (SET FFs). Flip Flops are most essential elements in the design of sequential circuits. We did the comparison for their performance and power dissipation and have also compared the transistor count of each Flip Flop.

References

9

A reduced clock-swing flip-flop (RCSFF) for 63% power reduction

Hiroshi Kawaguchi, T. Sakurai · IEEE Journal of Solid-State Circuits · 1998 · 263 citations

Hardware Security, Low-power Electronics, Electrical Engineering +13

A 2.2 W, 80 MHz superscalar RISC microprocessor

G. Gerosa, S. Gary, C. Dietz et al. · IEEE Journal of Solid-State Circuits · 1994 · 235 citations

Low-power Electronics, Hardware Security, Electrical Engineering +13

High-performance energy-efficient D-flip-flop circuits

Uming Ko, Poras T. Balsara · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2000 · 144 citations

Low-power Electronics, Hardware Security, Electrical Engineering +9

Ultra-low voltage circuits and processor in 180nm to 90nm technologies with a swapped-body biasing technique

S. Narendra, James Tschanz, J. Hofsheier et al. · 2004 · 84 citations · Full text

Low-power Electronics, Ultra-low Voltage Circuits, Electrical Engineering +11

Low-power single- and double-edge-triggered flip-flops for high-speed applications

Seid Hadi Rasouli, Ahmad Khademzadeh, Ali Afzali‐Kusha et al. · IEE Proceedings - Circuits Devices and Systems · 2005 · 68 citations

Low-power Electronics, Hardware Security, Electrical Engineering +11