An integrated circuit layout design program based on a graph-theoretical approach

Naoshi Sugiyama, S. Nemoto, Kenji Kani, Tomi Ohtsuki, Hirohito Watanabe

1970 · 17 citations · 3 references

Concepts

Abstract

A graph-theoretical method, with wiring and placement problems considered simultaneously, will be discussed. The approach has resulted in the development of a computer program affording automatic layout design of single-layer IC chips on smallest possible areas.

References

3