Graph-theoretic Circuit Formulation

Graph-Theoretic Circuit Formulation is a mathematical framework that employs graph theory to model electrical circuits by representing circuit elements as edges and nodes in a network, thereby enabling systematic analysis of topology and constraints governed by Kirchhoff's Laws.

308

Publications

16.4K

Citations

583

Authors

301

Institutions

Publications per year

2017–2026

28

Authors

583

  1. RI
    R. Iris Bahar

    Brown University, United States

    4 publications · 144 citations

    4

    h-index

  2. SK
    Sung Kyu Lim

    Georgia Institute of Technology, United States

    3 publications · 111 citations

    3

    h-index

  3. DM
    D.A. Mlynski

    Karlsruhe Institute of Technology, Germany

    3 publications · 45 citations

    3

    h-index

  4. WE
    W.L. Engl

    FH Aachen, Germany

    3 publications · 45 citations

    3

    h-index

  5. SR
    Sherief Reda

    Brown University, United States

    3 publications · 103 citations

    3

    h-index

1–5 of 583

Venues

  1. IEEE Transactions on Circuits and Systems

    18 publications · 773 citations

    16

    h-index

  2. 12

    h-index

  3. Journal of Combinatorial Theory Series B

    11 publications · 451 citations

    11

    h-index

  4. Discrete Mathematics

    9 publications · 972 citations

    9

    h-index

  5. IEEE Transactions on Circuit Theory

    7 publications · 165 citations

    7

    h-index

1–5