Graph-theoretic Circuit Formulation
Graph-Theoretic Circuit Formulation is a mathematical framework that employs graph theory to model electrical circuits by representing circuit elements as edges and nodes in a network, thereby enabling systematic analysis of topology and constraints governed by Kirchhoff's Laws.
308
Publications
16.4K
Citations
583
Authors
301
Institutions
Publications per year
2017–2026
28
Parents
308
On maximal paths and circuits of graphs
P. Erdös · Acta Mathematica Academiae Scientiarum Hungaricae · 1959 · 903 citations
Öystein Ore · American Mathematical Monthly · 1960 · 750 citations
Crossing Number is NP-Complete
M. R. Garey, David S. Johnson · SIAM Journal on Algebraic and Discrete Methods · 1983 · 669 citations
A note on Hamiltonian circuits
Vašek Chvátal, P. Erdös · Discrete Mathematics · 1972 · 629 citations
1–5 of 308
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301
University of California, Berkeley
Berkeley, United States
11 h-index
18 publications
1K citations

University of Waterloo
Waterloo, Canada
7 h-index
12 publications
531 citations
ETH Zurich
Zurich, Switzerland
5 h-index
7 publications
359 citations
University of Michigan
Ann Arbor, United States
5 h-index
12 publications
263 citations
University of California, Los Angeles
Los Angeles, United States
5 h-index
11 publications
479 citations

National Taiwan University
Taipei, Taiwan
4 h-index
4 publications
128 citations

University of Twente
Enschede, The Netherlands
4 h-index
7 publications
359 citations
Princeton University
Princeton, United States
4 h-index
7 publications
524 citations
1–8 of 301
18 publications · 773 citations
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14 publications · 738 citations
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11 publications · 451 citations
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9 publications · 972 citations
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7 publications · 165 citations
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