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Utilizing Sub-5 nm sidewall electrode technology for atomic-scale resistive memory fabrication
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2014
Year
Unknown Venue
EngineeringMemory DesignEmerging Memory TechnologyComputer ArchitecturePhase Change MemoryComputer MemoryReasonable ReliabilityElectronic DevicesNanoelectronicsMemory DeviceMemory DevicesSidewall Electrode TechnologyMaterials ScienceElectrical EngineeringNanotechnologyElectronic MemoryMagnetoresistive Random-access MemoryMicroelectronicsMemory ReliabilityStress TimeApplied PhysicsSemiconductor MemoryResistive Random-access Memory
A sidewall electrode technology was successfully developed for the first time in this study, improving the understanding of the working mechanism in an ultra small, functional HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based resistive random access memory (RRAM) device (<; 1 × 3 nm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). This technology exhibits potential for application in atomic-scale memories. The 1 × 3 nm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> RRAM device exhibited an excellent performance, featuring a high endurance of more than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> cycles, a large on/off verified window (>100), and reasonable reliability (stress time > 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> s, 2 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> h at 250 °C). Furthermore, the 1 × 3 nm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> RRAM device exhibited distinctive unipolar behavior when a high voltage and rapid switching operation (7 V, 50 ns) were applied, and a switching mechanism model is proposed.