<title>Characterization of the embedded micromechanical device approach to the monolithic integration of MEMS with CMOS</title>

TLDR

Interest in monolithic integration of MEMS with CMOS has grown, as it promises improved device performance and lower manufacturing, packaging, and instrumentation costs by combining micromechanical and electronic components in a single process. This work introduces a MEMS‑first integration process, detailing its refinements, wafer‑scale parametric measurements, and the performance of integrated sensing devices. The process embeds micromechanical devices in a shallow trench, planarizes and seals them, then applies a high‑temperature anneal to relieve polysilicon stress before conventional CMOS processing, enabling the wafers to serve as starting material for standard CMOS fabrication. The integrated process achieves a circuit yield exceeding 98 %.

Abstract

Recently, a great deal of interest has developed in manufacturing processes that allow the monolithic integration of microelectromechanical systems (MEMS) with driving, controlling, and signal processing electronics. This integration promises to improve the performance of micromechanical devices as well as lower the cost of manufacturing, packaging, and instrumenting these devices by combining the micromechanical devices with a electronic devices in the same manufacturing and packaging process. In order to maintain modularity and overcome some of the manufacturing challenges of the CMOS-first approach to integration, we have developed a MEMS-first process. This process places the micromechanical devices in a shallow trench, planarizes the wafer, and seals the micromechanical devices in the trench. Then, a high-temperature anneal is performed after the devices are embedded in the trench prior to microelectronics processing. This anneal stress-relieves the micromechanical polysilicon and ensures that the subsequent thermal processing associated with fabrication of the microelectronic processing does not aversely affect the mechanical properties of the polysilicon structures. These wafers with the completed, planarized micromechanical devices are then used as starting material for conventional CMOS processes. The circuit yield for the process has exceeded 98 percent. A description of the integration technology, the refinements to the technology, and wafer- scale parametric measurements of device characteristics is presented. Additionally, the performance of integrated sensing devices built using this technology is presented.