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Fabrication of 0.2 μm large scale integrated circuits using synchrotron radiation x-ray lithography
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1995
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EngineeringOverall OverlayElectron-beam LithographyOptoelectronic DevicesIntegrated CircuitsμM Large ScaleWafer Scale ProcessingAdvanced Packaging (Semiconductors)Beam LithographyIntegrated Circuit DesignElectrical EngineeringMetallization LevelsSemiconductor Device FabricationSynchrotron RadiationMicroelectronicsMicrofabricationApplied PhysicsSynchrotron Radiation LithographyBeyond Cmos
In the last few years, we have made dramatic improvements in the key components of synchrotron radiation x-ray lithography including a high-brightness and compact synchrotron radiation source, high-accuracy steppers, precise masks, and highly sensitive chemically amplified resists. These advances have been used in the test fabrication of complementary metal–oxide–semiconductor large scale integrated circuits using separation by implanted oxygen technology in the 0.2 μm regime. Synchrotron radiation lithography was used at the active, gate, contact, and four-level metallization levels or at the gate level only. Fabricated gate array large scale integrated circuits, including a 48×48 bit multiplier, have excellent and fully functional characteristics. This article describes lithographic performance under device fabrication conditions, demonstrating an excellent critical dimension control of 0.02 μm (3σ), an overall overlay better than 0.15 μm (3σ) (including metallization levels), and a throughput of 12 wafers (6 in.) per hour.