We examine the effects of void morphology and critical current density (j _c ) on the electromigration failure distributions of Cu/low- k dual-damascene vias. Cu dual-damascene vias exhibit multiple modes of electromigration-induced voiding, and reliability is strongly dependent on the morphology of voids. We have developed a model of failure for dc and pulsed dc currents that allows prediction of failure time distributions for vias, taking into account void morphology. We obtain good agreement between the model predictions and experimental data for all observed void morphologies. The model demonstrates that while the concept of ldquoimmortalityrdquo is valid for individual conductors, it cannot be applied to eliminate failure of all nominally identical conductors in large sample sizes that are typical of integrated circuits. We experimentally confirm the existence of resistance increase failures for test populations of nominally identical conductors stressed below the sample average j _c . Moreover, failure time distributions for vias exhibit distortion from lognormal and saturation in the vicinity of j _c , but they are predictable for all values of j. New reliability extrapolation procedures are required for accurate projection of electromigration lifetimes close to j _c . We suggest that the description of the effects of j _c on failure distributions of vias discussed here is generally valid irrespective of the choice of conductor and barrier layer materials, and we demonstrate equivalent characteristic behavior of electromigration failure time distributions for both Al and Cu interconnects. Our results also indicate that, in general, accurate modeling of j _c for conductor failure requires consideration of both nucleation and growth phenomena, with the relative contribution of each process to j _c being dependent on the voiding failure mode.

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