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Effects of TiN Deposition on the Characteristics of W/TiN/SiO[sub 2]/Si Metal Oxide Semiconductor Capacitors
16
Citations
9
References
2001
Year
EngineeringSilicon On InsulatorSemiconductorsNanoelectronicsHigh LevelThin Film ProcessingTin Deposition TechniqueMaterials ScienceMaterials EngineeringElectrical EngineeringCrystalline DefectsOxide ElectronicsTin DepositionOxide SemiconductorsSemiconductor MaterialSemiconductor Device FabricationInterface TrapsSurface ScienceApplied PhysicsThin FilmsChemical Vapor Deposition
We report the effects of the TiN deposition technique on the generation and annihilation of interface traps and oxide trapped charges in (2–6 nm)/Si metal oxide semiconductor (MOS) system during direct metal gate process. The TiN films were prepared by reactive sputtering using the Ti target or chemical vapor deposition (CVD) using and Sputter-deposited TiN not only generated a high level of interface traps from the bandedge to the near midgap of Si, but also introduced oxide trapped charges of The damages annealed out for (⩾3 nm) to the range of by the post-metal anneal (PMA) at 800°C in or at 450°C in forming gas. The interfacial damages for ultrathin (∼2 nm), however, were hardly capable of relieving even after the PMA of 800°C, resulting in an interface trap density in the high range. The level created after CVD-TiN was as low as with negligible even without PMA, and this level was further reduced to after PMA. We observed a noticeable increase of the capacitance equivalent thickness when prepared with CVD-TiN plausibly due to Cl from the source gas. © 2001 The Electrochemical Society. All rights reserved.
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