2010 · 13 citations · 13 references
ComputingComputer EngineeringComputer ScienceFault ToleranceFault-tolerant ComputingFault-tolerant SystemsControl-flow AnalysisFault DetectionFault InjectionHardware Fault ToleranceMicroarchitectural SecuritySecurity HardeningBasic Block AnalysisControl Flow ControlFault Injection In MicroprocessorsFault-tolerant Processor DesignMicroarchitectural Fault InjectionMicroprocessor-based ProtectionSoft Error DetectionSoft Error Mitigation
This paper presents a detailed analysis of the efficiency of software-only techniques to mitigate SEU and SET in microprocessors. A set of well-known rules is presented and implemented automatically to transform an unprotected program into a hardened one. SEU and SET are injected in all sensitive areas of MIPS-based microprocessor architecture. The efficiency of each rule and a combination of them are tested. Experimental results show the limitations of the control-flow techniques in detecting the majority of SEU and SET faults, even when different basic block sizes are evaluated. A further analysis on the undetected faults with control flow effect is done and five causes are explained. The conclusions can lead designers in developing more efficient techniques to detect these types of faults.
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