Spectrum

Abstract

On many-core chip designs, short, often-multicast, latency-critical messages, used extensively in high-level coherence and synchronization protocols, often become the bottleneck of parallel performance scaling. This paper presents Spectrum, a hybrid nanophotonic-electric on-chip network that optimizes both throughput and latency. Spectrum's novel planar nanophotonic subnetwork broadcasts latency-critical messages through a wavelength-division multiplexed (WDM) two-dimensional waveguide. Spectrum's throughput-optimized packet-switching electrical subnetwork handles high bandwidth traffic. Overall, Spectrum delivers an almost ideal CMOS-compatible interconnection network for many-core systems.