GaN enhancement/depletion-mode FET logic for mixed signal applications

Abstract

The first demonstration of enhancement/depletion (E/D)-mode integrated digital circuits in GaN technology is reported. Specifically, the performance of static divide by 2 circuit implemented in direct coupled FET logic and of a 23-stage ring oscillator, implemented in super-buffered FET logic are presented. The reported E/D technology is potentially suitable for fabrication of mixed signal GaN circuits.