High-Quality SOI by Bonding of Standard SI Wafers and Thinning by Polishing Techniques Only

Abstract

A technology is described for Silicon-on-Insulator (SOI) wafer fabrication realized by Van der Waals wafer bonding followed by wafer thinning. The uniqueness of this procedure is that only standard silicon wafer material and standard grinding and polishing techniques, derived from optics and silicon-wafer manufacturing, are applied. Submicron precision concerning flatness and parallelism of a 10 cm diameter wafer pair is achieved. The present SOI layer thickness aimed at is 5 µm but thinner layers are feasible.