2011 · 13 citations · 1 references
EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesDevice ModelingIntegrated Circuit DesignLayout OptimizationMetal-oxide-semiconductor Field-effect TransistorsPhysical DesignShort-channel EffectsDevice OptimizationGate Dielectric EngineeringMetal Gate ScalingMetal GatesPower MosfetsThreshold VoltageThreshold Voltage ControlThreshold Voltage Roll-off
We report a new N/PFET Gate Patterning Boundary Proximity layout dependent effect in high-k dielectric/Metal Gate (HK/MG) MOSFETs which causes anomalous threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> ) modulation for the first time. We investigated the mechanism by using special test structures and process optimizations to suppress this layout dependency. Finally, we achieved the best over all process optimization which makes it possible to suppress layout dependency without degrading FET performance/yield/reliability.
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Lateral ion implant straggle and mask proximity effect
Terence B. Hook, J. Brown, P.E. Cottrell et al. · IEEE Transactions on Electron Devices · 2003 · 99 citations