A comparison of electrostatic discharge models and failure signatures for CMOS integrated circuit devices

Abstract

Six different CMOS device codes were evaluated, according to available test standards, for Electrostatic Discharge (ESD) sensitivity using three ESD models: Human Body Model (HBM), Machine Model (MM), Field-induced Charged Device Model (FCDM). Four commercially available simulators were used: two to perform the HBM ESD evaluations and two to perform the MM ESD evaluations. FCDM stressing was performed using an AT&T designed simulator. All stressing was performed at AT&T Bell Laboratories, Delco Electronics, and Ford Microelectronics. The failure threshold voltage and failure signature associated with each ESD model and simulator were determined for each test sample. Threshold correlation and regression analyses were also performed. Though the three ESD models and simulators created multiple failure signatures, they do not exhibit a high degree of overlap. Our results show a high correlation between the ESD thresholds, failing pins, failing circuitry, and failing structures for HBM and MM stressing of the device codes evaluated.