Diamond layout style impact on SOI MOSFET in high temperature environment

A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA

Fernando Silveira, Denis Flandre, P.G.A. Jespers · IEEE Journal of Solid-State Circuits · 1996 · 650 citations

Engineering, Electrical Engineering, Analog Electronics +15

Design of SOI CMOS operational amplifiers for applications up to 300°C

J.-P. Eggermont, D. De Ceuster, Denis Flandre et al. · IEEE Journal of Solid-State Circuits · 1996 · 110 citations

Engineering, Electrical Engineering, Analog Electronics +16

Diamond MOSFET: An innovative layout to improve performance of ICs

Salvador Pinillos Gimenez · Solid-State Electronics · 2010 · 58 citations

Engineering, Computer Engineering, Electrical Engineering +14

A Comparative Study of Electrical Characteristic on Sub-10-nm Double-Gate MOSFETs

Yiming Li, H.-M. Chou · IEEE Transactions on Nanotechnology · 2005 · 55 citations

Engineering, Electrical Engineering, Microelectronics +16

Compact diamond MOSFET model accounting for PAMDLE applicable down 150 nm node

Salvador Pinillos Gimenez, E. Davini, Vinicius Vono Peruzzi et al. · Electronics Letters · 2014 · 34 citations · Full text

Engineering, Electrical Engineering, Microelectronics +15