IEEE Transactions on Industrial Electronics · 2014 · 114 citations · 24 references
EngineeringComputer EngineeringElectrical EngineeringElectric MachinesField-programmable Gate ArraysHardware Description LanguagesField-programmable Gate Array ArchitectureFpga ArchitectureFpga Programming ModelsHardware Modeling For Digital SystemsHardware-in-the-loop TestingHardware-in-the-loop ValidationEmulationField-programmable Gate Arrays (Fpgas)Fixed-point ArithmeticFpga PrototypingHardware SimulationHardware-assisted EmulationReal-time EmulationResource Consumption Modeling
Hardware-in-the-loop (HIL) technology is increasingly becoming the preferred, reliable, and cost-effective alternative in a virtual scenario for tedious, time-consuming, and expensive tests on real devices. This paper presents a digital hardware emulation of commonly used electrical machines for HIL simulation on the field-programmable gate arrays (FPGAs) in a general framework. This paper provides a useful and comprehensive comparison between floating- and fixed-point arithmetic for hardware implementation, and addresses the differences of deeply pipelined and highly paralleled realization schemes, and the contribution of schematic and textual programming language methods for design configuration of electrical machine models. The hardware implementation by these approaches is evaluated in terms of real-time step size, accuracy, and hardware resource consumption. Finally, an experimentally measured electrical machine behavior is employed to demonstrate the effectiveness of the emulated electrical machine.
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