An analog/digital BCDMOS technology with dielectric isolation-devices and processes

Abstract

A dielectrically isolated bipolar-CMOS-DMOS (BCDMOS) integrated-circuit technology that has been successfully developed for high-voltage applications (150-500 V) is reported. This technology integrates bipolar, CMOS, DMOS, p-n-p-n, JFET, and DGDMOS (dual-gate DMOS) devices on a single chip. The core BCDMOS process is chosen to be an optimized poly-gate n-channel DMOS process; additional levels and their relative sequences were chosen on the basis of their effects on the performance of the various kinds of devices in the chip and the trade-offs among those performances. The characteristics of the major devices in solid-state switches for telecommunication applications are demonstrated.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>