Frequency characterization and modeling of interface traps in HfSixOy/HfO2 gate dielectric stack from a capacitance point-of-view

Abstract

A time-resolved analysis of the capacitance–voltage (C–V) technique and an inverse modeling approach have been developed to determine the energy distribution and the capture cross section of interface traps in the silicon band gap from multifrequency C–V measurements. In this work, our method is performed on n-type metal-oxide-semiconductor capacitors with HfSixOy/HfO2 gate dielectric stack and polysilicon gate. From the frequency dispersion of C–V data, we evidence a peak of acceptor states in the upper half of the band gap at 0.81 eV above the valence band and characterized by a capture cross section of 1.5×10−17 cm2. This value is approximately ten times lower than typical capture cross sections relative to the dangling bonds (Pb centers) at the Si/SiO2 interface, which is in good agreement with a Coulombic center model predicting a capture cross section inversely proportional to the square of the dielectric permittivity.