Suppressing V<inf>t</inf> and G<inf>m</inf> variability of FinFETs using amorphous metal gates for 14 nm and beyond

Abstract

Amorphous TaSiN metal gates (MGs) are successfully introduced in FinFETs to suppress work function variation (WFV) of the MG, which is a dominant contributor to threshold voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> ) variability of the undoped channel MG FinFETs. Comparing with a poly-crystalline TiN gate, the TaSiN gate reduces V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> variation drastically and records the smallest A <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Vt</inf> value of 1.34 mVμm reported so far for MG FinFETs. Interface traps also become a dominant A <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Vt</inf> origin in the case of well-suppressed WFV using the amorphous M G. The WFV suppression is also effective to reduce trans-conductance (G <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf> ) variability which will be a dominant source of on-current (I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</inf> ) variability in 14 nm technology and beyond.