Publication | Closed Access
3-D Numerical and Experimental Investigations on Compression Molding in Multichip Embedded Wafer Level Packaging
21
Citations
8
References
2012
Year
EngineeringMechanical EngineeringComputer-aided DesignComputational MechanicsMolding (Process)Advanced Packaging (Semiconductors)3-D NumericalElectronic PackagingWafer Level CompressionMolding Defects3D Ic ArchitectureCompression MoldingLevel EncapsulationChip On BoardChip AttachmentManufacturing EngineeringMicroelectronics3D PrintingChip-scale PackageMicrofabricationProduction EngineeringMechanics Of MaterialsExperimental Investigations
This paper focuses on the 3-D numerical methodology development of wafer level compression molding. With its successful application in a two-die-package embedded wafer level encapsulation, flow patterns, velocity, and pressure distributions are compared for different die size and die thickness. The computed flow-induced forces indicate which zone has a high risk of die sliding. The simulated molten molding compound flow fronts are compared with actual molding short shot samples. The key advantage of this numerical study is that it helps detect the molding defects quickly and improve moldability problems efficiently, in order to reduce manufacturing cost and design cycle time.
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