IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1985 · 41 citations · 11 references
EngineeringComputer EngineeringElectrical EngineeringCircuit TheoryMicroelectronicsSemiconductor DevicesCmos Circuit DesignDevice ModelingDevice SimulationDigital Integrated Circuit DesignIntegrated Circuit DesignSimulation ModelingCircuit ModelingCircuit SimulationCompact ModelingComplementary Metal-oxide-semiconductor SimulationField-effect Transistor SimulationMetal-oxide-semiconductor Field-effect Transistor ModelingSwitch SimulationSystem-level Simulation
This paper describes a novel approach to switch-level simulation of MOS circuits. The circuit is first partitioned into connector-switch networks CSN [4]. Then each CSN is represented in terms of a decision diagram DD, which is particularly suitable for use in simulators. The advantages of DD's are that they are based on a solid theory and they permit fast evaluation of the network's response to any input vector. The CSN's are coupled through a 3-state automaton representing charge wells associated with transistor gates.
11
Akers · IEEE Transactions on Computers · 1978 · 1.8K citations
Worst-case Analysis of Set Union Algorithms
Robert E. Tarjan, Jan Van Leeuwen · Journal of the ACM · 1984 · 458 citations · Full text