Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS

Concepts

EngineeringVlsi DesignComputer ArchitecturePower ElectronicsHardware SecurityReliability EngineeringReliabilityElectrical EngineeringHardware ReliabilityBias Temperature InstabilityComputer EngineeringReliability EnhancementDevice ReliabilityMicroelectronicsBi-stable Puf DesignsAccelerated AgingCircuit ReliabilityActivation ControlBeyond Cmos

Abstract

We demonstrate the efficacy and associated costs of three reliability enhancing techniques for bi-stable PUF designs (SRAM and sense amplifier-based) - directed accelerated aging, multiple evaluations, and activation control. Measured results from a 65nm bulk CMOS full custom PUF testchip demonstrate that these technique are able to reduce the percentage of unreliable bits by up to 40%, 83%, and 71% respectively.

References

Physical unclonable functions for device authentication and secret key generation

G. Edward Suh, Srinivas Devadas · Proceedings - ACM IEEE Design Automation Conference · 2007 · 2.1K citations

Hardware Trojan, Engineering, Information Security +16

Silicon physical random functions

Blaise Gassend, Dwaine Clarke, Marten van Dijk et al. · 2002 · 1.6K citations

Hardware Trojan, Engineering, Evolvable Hardware +20

Extracting secret keys from integrated circuits

Daihyun Lim, J.W. Lee, Blaise Gassend et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2005 · 1K citations

Hardware Trojan, Engineering, Information Security +17

A technique to build a secret key in integrated circuits for identification and authentication applications

J.W. Lee, Daihyun Lim, Blaise Gassend et al. · 2004 · 822 citations

Hardware Trojan, Engineering, Vlsi Design +22

Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers

Daniel Holcomb, Wayne Burleson, Kan Fu · IEEE Transactions on Computers · 2008 · 803 citations

Hardware Trojan, Engineering, Information Security +19