A Study on a Metal-Ferroelectric-Oxide-Semiconductor Structure with Thin Silicon Oxide Film Using SrBi₂Ta₂O₉ Ferroelectric Films Prepared by Pulsed Laser Deposition

Abstract

A preferentially (105)-oriented SrBi 2 Ta 2 O 9 (SBT) thin film on SiO 2 /n-Si(100) or on Pt is prepared by pulsed laser deposition (PLD) at a low temperature of about 500°C. Polarization-electric field ( P – E ) hysteresis is observed on the Pt/SBT/Pt diode, where 2 P r is 5 µC/cm 2 and E c is 34 kV/cm, respectively. Counterclockwise hysteresis appears in the C – V curve of the Al/SBT/SiO 2 /Si structure only when a (105) peak is observed under various growth conditions by PLD. This means that (105)-oriented perovskite SBT exhibits counterclockwise hysteresis and noncrystalline SBT does not exhibit hysteresis. The memory window has been increased from 2.7 V to 4.3 V by changing the thickness ratio of SBT/SiO 2 from 400 nm/27 nm to 400 nm/8 nm. This shows that an efficient electric field in SBT is increased in the case of 8 nm SiO 2 film; then E c and the resulting memory window are also increased. Positive shifts in the C – V curves are observed when SiO 2 thickness decreases down to about 10 nm. One of the mechanisms of the shift is considered to be that a negative charge is generated by electron tunneling through the SiO 2 from the conduction band of n-Si and is fixed at the SBT/SiO 2 interface or in the SBT bulk site. Also, the memory window starts to decrease when the gate bias applied to the MFOS diode is sufficiently increased. This indicates that the charge injection mode becomes dominant then reduces dielectric counterclockwise hysteresis. The retention time has been improved up to about 3×10 3 sec with an optimized hold bias voltage in an MFOS diode with SiO 2 thickness of 27 nm.