Publication | Closed Access
Chip Power Model - A New Methodology for System Power Integrity Analysis and Design
48
Citations
5
References
2007
Year
Unknown Venue
Hardware ModelingEngineeringPower CircuitPower Optimization (Eda)Computer ArchitecturePower ElectronicsHardware SecurityReliability EngineeringFull-chip Power NetworkSystems EngineeringNew MethodologyPower-aware DesignChip Power ModelElectrical EngineeringHardware ReliabilityComputer EngineeringMicroelectronicsAccuracy ValidationPower IcSmart GridEnergy ManagementCircuit Simulation
A compact SPICE equivalent circuit model of full-chip power network is proposed in this paper to address the system power integrity co-design and optimization. The theory and procedures for the generation of the compact chip power model is described. The accuracy validation of the chip power model is also presented.
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