Design Of Ion-implanted MOSFET's with Very Small Physical Dimensions

Abstract

This paper considers the design, fabrication, and characterization of very small MOSFET switching devices suitable for digital integrated circuits using dimensions of the order of 1 .Scaling relationships are presented which show how a conventional MOS-FET can be reduced in size.An improved small device structure is presented that uses ion implantation to provide shallow source and drain regions and a nonuniform substrate doping profile.Onedimensional models are used to predict the substrate doping profile and the corresponding threshold voltage versus source voltage characteristic.A two-dimensional current transport model is used to predict the relative degree of short-channel effects for different device parameter combinations.Polysilicon-gate MOSFET's with channel lengths as short as 0.5 were fabricated, and the device characteristics measured and compared with predicted values.The performance improvement expected from using these very small devices in highly miniaturized integrated circuits is projected. I. LIST OF SYMBOLSInverse semilogarithmic slope of subthreshold characteristic.Width of idealized step function profile for channel implant.Work function difference between gate and substrate.Dielectric constants for silicon and silicon dioxide.Drain current.Boltzmann's constant.Unitless scaling constant.MOSFET channel length.Effective surface mobility.Intrinsic carrier concentration.Substrate acceptor concentration.Band bending in silicon at the onset of strong inversion for zero substrate voltage.Built-in junction potential.