High-Performance and Low-Power CMOS Device Technologies Featuring Metal/High-k Gate Stacks with Uniaxial Strained Silicon Channels on (100) and (110) Substrates

Y. Tateshita, J. Wang, K. Nagano, T. Hirano, Y. Miyanami, Tetsuya Ikuta, Toshihiko Kataoka, Yoshiaki Kikuchi, S. Yamaguchi, Takao Ando,

2006 · 25 citations · 0 references

Concepts

Abstract

CMOS technologies using metal/high-k damascene gate stacks with uniaxial strained silicon channels were developed. Gate electrodes of HfSix and TiN were applied to nFETs and pFETs, respectively. TiN/HfO2 damascene gate stacks and epitaxial SiGe source/drains were successfully integrated for the first time. As a result, drive currents of 1050 and 710 uA/um at Vdd=1 V, Ioff= 100 nA/um and Tinv=1.6 nm were obtained for the nFETs and pFETs. The further integration of pFETs on (110) substrates contributed to a higher drive current of 830 uA/um. These performances were realized under low gate leakage currents of 0.03 A/cm2 and below.