V/sub TH/-hopping scheme to reduce subthreshold leakage for low-power processors

Abstract

In order to suppress the power consumption in low-voltage processors, a threshold voltage hopping (V/sub TH/-hopping) scheme is proposed where the threshold voltage is dynamically controlled through software depending on a workload. V/sub TH/-hopping is shown to reduce the power to 18 % of the fixed low-threshold voltage circuits in 0.5-V supply voltage regime for multimedia applications. A positive back-gate bias scheme with V/sub TH/-hopping is presented for the high-performance and low-voltage processors. In order to verify the effectiveness of V/sub TH/-hopping, a small-scale RISC processor with V/sub TH/-hopping capability and the positive back-gate bias scheme is fabricated in a 0.6-/spl mu/m CMOS technology. MPEG4 encoding is simulated based on the measured data. The result shows that 86% power saving can be achieved by using V/sub TH/-hopping compared with the fixed positive back-gate bias scheme.