2012 · 21 citations · 6 references
EngineeringComputer EngineeringElectrical EngineeringDigital CommunicationSystem-on-chip DesignWireless CommunicationsChannel CodingChannel EstimationDigital Signal ProcessingHardware AccelerationWireless Channel ModelingWireless NetworksCmos ScalingHigh PerformanceMimoMimo SystemsQr DecompositionReconfigurable Hardware ArchitectureThroughputThroughput Improvement
In this paper, we propose a hardware architecture of high-speed sorted QR decomposition for a 4×4 MMSE-MIMO decoder. A QR decomposition (QRD) is commonly used in many MIMO detection algorithms. In particular, a sorted QR decomposition (SQRD) is a advanced algorithm to improve a MIMO detection performance. The proposed architecture can decompose an augmented channel matrix for MMSE detection by using modified Gram-Schmidt algorithm with pipelining and resource sharing processing. This architecture can be applied in a high-throughput MIMO-OFDM system such as IEEE802.11n which supports data throughput of up to 600Mbps. We implement the proposed architecture with 334k gates in 90nm CMOS technology. The proposed design can achieve a high performance of up to 50.0 million 4×4 SQRD operations per second with the maximum operating frequency of 300 MHz.
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MMSE extension of V-BLAST based on sorted QR decomposition
Dirk Wübben, Ronald Böhnke, V. Kühn et al. · 2003 · 475 citations
VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition
P. Luethi, Andreas Burg, S. Haene et al. · 2007 · 83 citations · Full text
Engineering, Computer Engineering, Electrical Engineering +15