Publication | Closed Access
Modeling of Interconnect Dielectric Lifetime Under Stress Conditions and New Extrapolation Methodologies for Time-Dependent Dielectric Breakdown
39
Citations
11
References
2007
Year
Unknown Venue
EngineeringInterconnect Dielectric LifetimeLow-k DielectricInterconnect (Integrated Circuits)Electromagnetic CompatibilityReliability EngineeringNanoelectronicsElectric FieldComputational ElectromagneticsElectronic PackagingStress ConditionsReliabilityElectrical EngineeringElectromigration TechniqueHardware ReliabilityTime-dependent Dielectric BreakdownComputer EngineeringAdvanced MicroelectronicsDevice ReliabilityMicroelectronicsPhysic Of FailureCircuit ReliabilityMechanics Of MaterialsElectrical Insulation
Advanced microelectronics interconnect systems can have metal leads several hundred meters long with minimum metal to metal spacing of <100nm. The low-k dielectric between adjacent metal lines has a lower dielectric breakdown strength compared to gate oxides. Accelerated testing of the interconnect time-dependent dielectrics breakdown (TDDB) is required during the development of new technology nodes, to ensure the reliability of these systems. This paper presents simulations that show how actual line-to-line spacing variations influence test results such that they can predict too low product lifetime. In fact, it is argued here that one can adhere to a conservative model for the lifetime dependence on the electric field (such as the is-model) and still pass stringent reliability requirements if the accelerated breakdown test results distributions are interpreted correctly.
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