Stacked SiO<inf>2</inf>/Si<inf>3</inf>N<inf>4</inf>/SiO<inf>2</inf>dielectric layer for reliable memory capacitor

T. Watanabe, A. Menjoh, M. Ishikawa, J. Kumagai

1984 · 11 citations · 3 references

Concepts

Abstract

This papar deals with the reliability aspects of the stacked film of SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> /Si <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> /SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> as a dielectric layer for dynamic memories. The leakage current of the MIS capacitor with the stacked film is sufficiently small. It is well explained by a model with Fowler-Nordheim (F-N) current in SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> and Poole-Frenkel (P-F) current in Si <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> . Using this model, the flat band voltage shifts of the MIS capacitor are estimated to be less than IV under the operating voltage 5V. Compared with MOS capacitors, the stacked MIS capacitors show a lower failure rate of time-zero dielectric breakdown, a smaller electric field acceleration factor, and a comparable activation energy of time dependent dielectric breakdown (TDDB). The stacked layer is prominent as a dielectric layer for dynamic memories with small geometry.

References

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