IEEE Journal of Solid-State Circuits · 1981 · 24 citations · 6 references
Untrimmed D/a ConverterDac LinearityEngineeringData ConverterMixed-signal Integrated CircuitAnalog DesignComputer EngineeringLinearity ErrorDigital Circuit DesignMicroelectronics17-Bit LinearityAnalog-to-digital Converter
Describes a monolithic 14-bit DAC which uses a new compensation technique for the DAC linearity, the `self-compensation technique', originated through a new concept. Since this technique automatically compensates for linearity error in the DAC by referring to a ramp function with about 17-bit linearity, a high precision DAC can be produced in monolithic form without the trimming of analog components. An experimental 14-bit DAC chip has been fabricated using analog compatible IIL technology and two-level metalization. A linearity error of less that /spl plusmn/1/2 LSB and a settling time of 1-2 /spl mu/s has been achieved.
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An inherently monotonic 12 bit DAC
J. Schoeff · IEEE Journal of Solid-State Circuits · 1979 · 83 citations
A high-speed, 12-bit monolithic D/A converter
R.P. Webb · 1978 · 17 citations
A monolithic 12-bit D/A converter
Douglas E. Comer · 1977 · 17 citations