FlexConnects: A Cost-Effective Implementation of Compliant Chip-to-Substrate Interconnects

Abstract

Compliant free-standing structures can be used as chip-to-substrate interconnects. Such "compliant interconnects" are a potential solution to the requirements that will be imposed on chip-to-substrate interconnects over the next decade. However, cost of implementation and electrical performance limit compliant interconnects. In this paper we present a new compliant interconnect technology called <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">"FlexConnects"</i> which attempts to address these two areas of concern. To fabricate <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FlexConnects</i> , sequential lithography and electroplating processes with two masking steps are utilized. Such an approach potentially reduces the cost of fabricating compliant interconnects. In this paper the viability of this fabrication process is demonstrated by fabricating interconnects at a 100μm pitch. A new compliant interconnect design was developed. The new design is based on the concept of employing parallel electrical paths as part of the compliant interconnect design. Through numerical simulations it is shown that the electrical performance of <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FlexConnects</i> (self inductance of ~37pH) is considerably enhanced without compromising their mechanical performance.