2014 · 21 citations · 2 references
EngineeringComputer EngineeringElectrical EngineeringComputer SecurityCryptographyLow-power DesignCryptographic ArchitectureDynamic Power ReductionLeakage Power ReductionLow-power Digital Circuit DesignPower ManagementPower OptimizationComparator DesignCorrelation AnalysisCorrelation Power AnalysisHardware Overhead AnalysisPower ConsumptionPower Consumption OptimizationPower Reduction AnalysisPrivate Key Protection
A supply-current equalizer disables a Correlation Power Analysis (CPA) attack on an AES cryptographic processor. An intermittent equalizer operation only at processing rounds critical to key disclosure suppresses the equalizer power overhead significantly. For this low-power intermittent operation, a Thru operation mode is proposed with minimum hardware overhead. A level-shift comparator hides its own power consumption in an internal equalized virtual supply to guarantee secure protection of a secret key. Test-chip measurement in 0.18μm CMOS successfully demonstrates CPA-attack resiliency. For the key protection against mostly-common last-round CPA, the equalizer power overhead is reduced by 11x which is only 8% of 128bit AES processor power consumption, and by 4x even including the initial/1st-rounds CPA protection capability.
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