Hardware Overhead Analysis

Hardware Overhead Analysis is a systematic evaluation method used in logic locking research to quantify the additional resource consumption, performance degradation, or power dissipation introduced by security-oriented modifications in integrated circuits.

555

Publications

18.6K

Citations

1.3K

Authors

430

Institutions

Publications per year

2017–2026

104

Authors

1.3K

  1. SK
    Sungho Kang

    Yonsei University, South Korea

    12 publications · 298 citations

    11

    h-index

  2. SW
    Seongmoon Wang

    Princeton University, United States

    11 publications · 348 citations

    10

    h-index

  3. YM
    Yiorgos Makris

    The University of Texas at Dallas, United States

    11 publications · 271 citations

    10

    h-index

  4. NA
    Nur A. Touba

    The University of Texas at Austin, United States

    10 publications · 599 citations

    10

    h-index

  5. HW
    Hans-Joachim Wunderlich

    University of Stuttgart, Germany

    11 publications · 580 citations

    10

    h-index

1–5 of 1.3K

Venues

  1. 26

    h-index

  2. IEEE Transactions on Computers

    31 publications · 1.2K citations

    20

    h-index

  3. 16

    h-index

  4. IEEE Access

    7 publications · 163 citations

    7

    h-index

  5. 7

    h-index

1–5