Publication | Closed Access
Simultaneous switching ground noise calculation for packaged CMOS devices
194
Citations
5
References
1991
Year
Low-power ElectronicsElectrical EngineeringEngineeringCircuit SystemCmos OutputsMixed-signal Integrated CircuitAnalog DesignComputer EngineeringNoiseInternal SwitchingGround Noise CalculationSwitching NoisePower ElectronicsMicroelectronicsSignal ProcessingElectromagnetic Compatibility
Here, it is assumed that the internal switching current is small compared to the output driver switching current. In the past, it was assumed that simultaneous switching noise created by CMOS outputs was directly proportional to the number of outputs switching simultaneously. Recent studies indicate that CMOS circuits exhibit sublinear behavior (due to the negative feedback influence) of power/ground noise (or bounce) as a function of the number of outputs switching simultaneously. Detailed electrical models, equations, and a trial architecture for calculating the switching noise are included. The results are compared to SPICE simulations and conventional power/ground noise calculations. The behavior of simultaneous switching noise as a function of constant-voltage (CV) device scaling is explained for small-geometry CMOS output drivers.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
| Year | Citations | |
|---|---|---|
1985 | 193 | |
1984 | 105 | |
2003 | 33 | |
1990 | 24 | |
2002 | 16 |
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