An experimental nanosecond Josephson 1K RAM using 5-µm Pb-alloy technology

Abstract

A high-speed fully decoded Josephson 1K RAM has been designed and tested. Several bits of the 1K RAM were successfully operated with a typical read access time of 3.3 ns and associated power dissipation of 2.0 mW. The chip, containing about 10 000 Josephson junctions, was fabricated using 5-µm Pb-alloy technology, including a novel junction oxide barrier formation technique. A nondestructive readout (NDRO) Josephson ring cell operating with all current levels equal and an on-chip timing circuit for read/write operations were employed.