Publication | Closed Access
An AND-Type Match-Line Scheme for High-Performance Energy-Efficient Content Addressable Memories
45
Citations
19
References
2006
Year
Hardware SecurityNon-volatile MemoryElectrical EngineeringEngineeringRealized 256Computer EngineeringComputer ArchitectureComputer ScienceHigh Search SpeedParallel ComputingContent-addressable MemoriesMicroelectronicsMemory ArchitectureAnd-type Match-line SchemeMulti-channel Memory Architecture
High search speed and low energy per search are two major design goals of content-addressable memories (CAMs). In this paper, an AND-type match-line scheme is proposed to realize a high-performance energy-efficient CAM. The realized 256 /spl times/ 128-b CAM macro, based on a 0.18-/spl mu/m 1.8-V CMOS process, achieves a 2.1-ns search time. When both the stored and search data are generated from an on-chip 4 /spl times/ 32-b LFSR with the same seed, the measured energy is 2.33-fJ/bit/search.
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