Avalanche buildup time of an InP/InGaAsP/InGaAs APD at high gain

Abstract

Under a high-gain operating condition, the presence of a multiplication process in the InGaAs(P) regions of an InP/InGaAsP/InGaAs avalanche photodiode (APD) having a structure of separated absorption and multiplication regions could lead to significant enhancement of the avalanche buildup time. As a result, the bandwidth of the device could be reduced considerably. The dependence of the avalanche multiplication factor and the intrinsic response time on the reverse bias voltage, the heterointerface field, the doping concentrations, and the width of the InP layer is examined in detail for the case in which hole injection is assumed. It is shown, for example, that for a fixed value of doping concentrations, reduction of the excess noise factor and enhancement of the gain-bandwidth product of the device can be achieved at the same time by a proper increase of the width of the InP layer.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>