IEEE Design & Test of Computers · 2007 · 41 citations · 12 references
EngineeringComputer EngineeringComputer ScienceFault ToleranceFault-tolerant ComputingHardware-software Co-designHardware Fault ToleranceInterconnect DesignNetwork-on-chip DesignReliable System DesignRoutingRouting ArchitectureEnergy ConsumptionFault-tolerant InterconnectsNetwork-on-chipNetwork-on-chip ArchitecturesOn-chip InterconnectsOn-chip NetworksRouting In Interconnection Networks On ChipSoft Errors
On-chip routing elements are extensively used in complex NoC designs. Faulty operation of such elements due to crosstalk faults or soft errors can severely affect a device's functionality and performance. This article investigates the application of different hardware- and software-based approaches to improving these elements' dependability, and discusses the advantages and drawbacks of these approaches from an energy consumption perspective.
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Robust system design with built-in soft-error resilience
Subhasish Mitra, N. Seifert, M. Zhang et al. · Computer · 2005 · 562 citations
SoCIN: A Parametric and Scalable Network-on-Chip
2003 · 186 citations
Fault modeling and simulation for crosstalk in system-on-chip interconnects
Michael Cuviello, S. Dey, Xiaoliang Bai et al. · 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) · 2003 · 162 citations
Engineering, Computer Engineering, Electrical Engineering +17