High-speed multi-modulus prescaler IC

T. Kamoto, N. Adachi, K. Yamashita

2002 · 12 citations · 2 references

Concepts

Abstract

This paper presents a high-speed multi-modulus prescaler IC which consists of nine stages of dual-modulus prescaler (+2/+3) connected in cascade. The multi-modulus prescaler divides the input clock frequency by an integer between 512 to 1024 with a unit step increment. Two kinds of prescaler ICs have been developed: one operates up to 1.2 GHz with a dissipation of 10.8 mW at 2.7 V, and the other operates up to 2.2 GHz with a dissipation of 19.2 mW at 2.7 V. The lower power consumption is achieved by using super self-aligned process technology and by minimizing the critical path delays of the circuits. These prescaler ICs will be applied to a programmable divider for a synthesizer which needs a fast-settling time.

References

2