EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesCmos Circuit DesignHigh-frequency Semiconductor DevicesIntegrated Circuit DesignMicrowave Integrated CircuitsMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsFrequency SynthesizersHigh-frequency ElectronicsHigh-speed Cmos DesignMicrowave Frequency Synthesizer DesignMicrowave TransistorsPolysiliconSiliconSilicon Microwave Integrated Circuits
The authors describe the Si ECL (emitter coupled logic) 3-mW, 1.0 GHz dual-modulus prescaler (64/65,/128/129) for a 3-V PLL (phase-locked loop) synthesizer system. This prescaler has low power dissipation suitable for automobile telephone, cordless telephone, and cellular radios. To achieve high speed with low power, circuits are fabricated with a 0.2- mu m emitter-based self-aligned with polysilicon electrodes and resistors (ESPER) process. This process features a shallow junction profile, small self-aligned emitter, a walled base, selectively ion-implanted collector, and polysilicon electrodes. The minimum device used for circuits has a 0.2*1.0 mu m/sup 2/ emitter area. These features enable the transistor to attain a maximum cut-off frequency of 28 GHz, 1.7 fF collector-base capacitance, and 2.4 fF emitter-base capacitance.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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