Publication | Closed Access
Damascene gate FinFET SONOS memory implemented on bulk silicon wafer
27
Citations
7
References
2005
Year
Unknown Venue
Non-volatile MemoryElectrical EngineeringEngineeringMicrofabricationNanoelectronicsApplied PhysicsComputer EngineeringComputer ArchitectureSemiconductor Device FabricationRetention TimeSemiconductor MemoryBulk Silicon WaferMicroelectronicsFinfet Sonos StructureFinfet Sonos Devices
We successfully demonstrate highly scaled damascene gate FinFET SONOS memory implemented on bulk silicon wafer. The FinFET SONOS devices show extremely high program/erase speed, large threshold voltage shifts over 4V at 1/spl mu/s/12V for program and 50/spl mu/s/-12V for erase, good retention time, and acceptable endurance. Thus, in sub-50nm regimes, ultra high speed operation becomes possible by using FinFET SONOS structure without sacrificing retention time.
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