Turn-off characteristics of the CMOS snapback ESD protection devices - new insights and its implications

Abstract

The residual voltage across the ESD snapback protection device after its turn-off is one of the key parameters that must be considered for efficient ESD protection design. Turn-off characteristics of various snapback devices (5VNMOS, 5V LVTSCR and 12V DeMOS-SCR), are analyzed with experimental data for the first time and it is demonstrated that the residual voltage after turn-off is a unique parameter and depends on the type of ESD device, its architecture and layout. The residual voltage after turn-off can vary in a wide range from holding voltage to DC breakdown voltage and is a function of the ESD pulse amplitude. The underlying physical mechanism causing the waveform behavior is discussed in detail.