2005 · 10 citations · 1 references
EngineeringComputer EngineeringComputer SystemsLow-power DesignMicroelectronicsVlsi DesignClock Distribution NetworksMemory DevicesMemory Hierarchy DesignMemory Hierarchy OptimizationMemory Subsystem DesignTiming AnalysisBlock RamBlock Ram ArchitectureMain Memory OrganizationRandom Access Memory (Ram)Synchronous Memory
1
250 Mbyte/sec synchronous DRAM using a 3-stage-pipelined architecture
Nagase, Kitamura, Koshikawa et al. · 1993 · 13 citations
Engineering, Computer Engineering, Electrical Engineering +10