Concepedia

Block Ram Architecture

Block RAM Architecture is a specialized memory organization within field-programmable gate array architecture that integrates configurable, hierarchically structured RAM blocks to enable efficient, high-speed data storage and access tailored to reconfigurable logic implementations.

156

Publications

4.7K

Citations

567

Authors

191

Institutions

Publications per year

2017–2026

38

Parents

Publications

156

A time-multiplexed FPGA

Stephen Trimberger, D. Carberry, Anju P. Johnson et al. · 2002 · 399 citations

, , +12

Area optimized implementation of AES algorithm on FPGA

Hrushikesh S. Deshpande, Kailash J. Karande · 2015 · 151 citations

, , +17

Computational Ram: A Memory-simd Hybrid And Its Application To Dsp

D.G. Elliott, W.M. Snelgrove, Michael Stumm · 1992 · 141 citations

, , +14

Run-time Partial Reconfiguration speed investigation and architectural design space exploration

Ming Liu, W. Kuehn, Zhonghai Lu et al. · 2009 · 134 citations

, , +17

Efficient multi-ported memories for FPGAs

Charles Eric LaForest, J. Gregory Steffan · 2010 · 129 citations · Full text

, , +12

1–5 of 156

Authors

567

  1. KN
    Koji Nakano

    Hiroshima University, Japan

    5 publications · 89 citations

    5

    h-index

  2. JG
    J. Gregory Steffan

    University of Toronto, Canada

    4 publications · 245 citations

    4

    h-index

  3. YI
    Yasuaki Ito

    Hiroshima University, Japan

    4 publications · 73 citations

    4

    h-index

  4. CE
    Charles Eric LaForest

    University of Toronto, Canada

    4 publications · 245 citations

    4

    h-index

  5. AA
    Ameer Abdelhadi

    University of British Columbia, Canada

    4 publications · 77 citations

    4

    h-index

1–5 of 567

Institutions

191

  1. University of Toronto

    Toronto, Canada

    7 h-index

    21 publications

    1.2K citations

  2. Xilinx (United States)

    San Jose, United States

    6 h-index

    18 publications

    1.9K citations

  3. Hiroshima University

    Hiroshima, Japan

    5 h-index

    19 publications

    336 citations

  4. Massachusetts Institute of Technology

    Cambridge, United States

    4 h-index

    9 publications

    302 citations

  5. University of British Columbia

    Vancouver, Canada

    4 h-index

    9 publications

    162 citations

  6. University of Chinese Academy of Sciences

    Beijing, China

    3 h-index

    19 publications

    337 citations

  7. City University of Hong Kong

    Hong Kong, Hong Kong

    3 h-index

    6 publications

    217 citations

  8. National Taiwan Normal University

    Taipei, Taiwan

    3 h-index

    13 publications

    242 citations

1–8 of 191

Venues

  1. IEEE Journal of Solid-State Circuits

    6 publications · 138 citations

    6

    h-index

  2. 5

    h-index

  3. 4

    h-index

  4. 3

    h-index

  5. IEEE Transactions on Nuclear Science

    3 publications · 124 citations

    3

    h-index

1–5