Vhdl-ams
VHDL-AMS is a standardized hardware description language that extends VHDL with analog and mixed-signal modeling capabilities, enabling the unified simulation of digital, analog, and mixed-signal systems within a single framework.
104
Publications
2.7K
Citations
270
Authors
95
Institutions
Publications per year
2017–2026
5
Variants
Vhdl-analog And Mixed-signal
Parents
104
1–5 of 104
270
5
h-index
5
h-index
École Polytechnique Fédérale de Lausanne, Switzerland
5 publications · 245 citations
5
h-index
4
h-index
Université de technologie de belfort-montbéliard, France
3 publications · 179 citations
3
h-index
1–5 of 270
95

University of Cincinnati
Cincinnati, United States
9 h-index
30 publications
646 citations

Centre National de la Recherche Scientifique
Paris, France
6 h-index
12 publications
158 citations
Politecnico di Torino
Turin, Italy
4 h-index
13 publications
180 citations

Sorbonne Université
Paris, France
4 h-index
7 publications
277 citations
University of Washington
Seattle, United States
4 h-index
14 publications
320 citations
Siemens (Hungary)
Budapest, Hungary
3 h-index
5 publications
353 citations
Université de technologie de belfort-montbéliard
Belfort, France
3 h-index
10 publications
662 citations
Laboratoire de Conception et d'Intégration des Systèmes
Valence, France
3 h-index
12 publications
131 citations
1–8 of 95
Repository · 3 publications · 38 citations
3
h-index
Conference · 3 publications · 44 citations
3
h-index
3 publications · 258 citations
3
h-index
2 publications · 120 citations
2
h-index
2 publications · 40 citations
2
h-index
1–5